1. Field of the Invention
The present invention relates to a semiconductor integrated circuit, especially to a packaged semiconductor integrated circuit in which connections between a logic circuit unit and semiconductor element electrodes are changeable according to an operating state of the logic circuit unit.
2. Description of the Related Art
In recent years, the degree of integration of a semiconductor integrated circuit has improved dramatically by evolution of the fine processing technology in semiconductor process, and the scale of the circuits contained by one semiconductor integrated circuit has become large. Consequently, a system LSI which realizes a great portion of functions of a system in one semiconductor integrated circuit has been used. Following the tendency, the number of the connection interfaces between the system LSI and a peripheral circuitry increases, and hence the number of the external terminals possessed by the system LSI also increases.
In the conventional semiconductor integrated circuit possessing a logic circuit unit therein, semiconductor element electrodes installed in a package and external terminals of the package are connected electrically for use in communication with external devices or circuitry, a power supply from the outside, and so on. The connection relationship of the semiconductor element electrodes and the signal lines which come out outside from the logic circuit unit in the package is usually fixed while the logic circuit unit is working. By way of exception, however, when testing the semiconductor integrated circuit, the connection relationship can be changed in an internal circuitry, and signals outputted to and inputted from the external terminals can be changed.
Moreover, a document 1 (Published Japanese patent application Hei 10-313091) discloses a technology which removes the restriction imposed by the location of external terminals at the time of mounting a packaged semiconductor integrated circuit on a board. In the technology disclosed by the document 1, a signal line, which comes out from the logic circuit unit in the package, is switched by a selection circuitry to connect to a different external terminal, thereby avoiding overlapped preparation of new external terminals which are required to reduce the restriction posed by the location of the external terminals.
However, as the degree of integration of a semiconductor integrated circuit advances, the area of the semiconductor element electrodes which connect the signal lines coming out from the logic circuit unit becomes large in comparison with the area of the logic circuit unit in the package, thereby hindering the area reduction of the semiconductor integrated circuit as a whole.
FIG. 14 is a layout drawing of the conventional packaged semiconductor integrated circuit. As shown in FIG. 14, in the conventional packaged semiconductor integrated circuit, a semiconductor element 3 is provided in a package 4, and external terminals composed of pads 5 and pins 6 are provided at the periphery of the package 4. The semiconductor element 3 possesses an internal logic circuit unit 1 and peripheral semiconductor element electrodes 2. The semiconductor element electrodes 2 connect with the signal lines (not shown) which come out from the logic circuit unit 1, and are further wire-bonded to the pads 5 when packaged. The area occupied by the logic circuit unit 1 is reduced with increasing degree of integration of the semiconductor integrated circuit; however, the area occupied by the semiconductor element electrodes 2 is not reduced. Consequently, a useless vacant area 7 arises in the semiconductor element 3.
Moreover, when more signal lines coming out from the logic circuit unit 1 are required as the logic circuit unit 1 is multi-functionalized in conjunction with higher integration of the semiconductor integrated circuit, a problem arises in the fact that the required number of the semiconductor element electrodes 2 is not securable, unless the area occupied by the semiconductor element electrodes 2 is increased.